FIG. 1 is a schematic drawing of an electrode structure for a prior-art optical modulator. In this example, an external modulation system using an LN modulator is shown. In prior art, a bias tee circuit 2, which comprises a DC field coil (L1) and a DC block capacitor (C), is coupled between an optical modulator 3 and a driver circuit 1 which drives the optical modulator. In general, a bias voltage is applied from the bias tee circuit 2 to thereby stably operate the optical modulator 3. FIG. 2 is a schematic circuit diagram of an electrode structure relating to a modulator which uses a silicon photonics modulator and a compound semiconductor in prior-art which are integrated on a silicon substrate by use of a silicon photonics technique. In FIG. 2, with respect to a signal electrode (S) side of a silicon photonics modulator 30 which is represented as capacitor C1 in a simplified manner, a bias circuit 20 is coupled to a driver IC circuit 10. The bias circuit 20 comprises, as shown, a resistance wire R, a DC power source (V1), and a capacitor (C); and, by varying, in an adjustable manner, a DC level with respect to a high frequency signal from the driver IC circuit, the silicon photonics modulator is operated at high speed.
However, in the construction that a bias tee such as that shown in FIG. 1 is adopted at the signal electrode side, it is forced to design the DC field coil (L1) and the DC block capacitor (C) to have large sizes, for maintaining a signal characteristic of the high frequency signal and stably operating the modulator. Thus, for the reason due to the physical size of the bias tee, it is difficult to arrange, in a monolithic manner, a bias tee circuit on a silicon substrate. On the other hand, in a construction similar to that shown in FIG. 2, it is necessary to set the impedance of the bias circuit to be sufficiently high, with respect to the signal electrode (S). Thus, in the case that plural modulators are integrated in a highly dense manner, or in the case, which will be explained in relation to the following embodiment, that an separated-electrode-type (divided-type) modulator is used as the modulator, there is a problem, which arises when miniaturization and densification are expected to be achieved, due to necessity that a capacitor C and a resistance wire R are arranged for each signal wire.
In prior art, for solving the above problem, it is further considered to construct an electrode to which a bias voltage can be applied at the ground electrode (GND) side (rather than the signal electrode side), such as that shown in FIG. 3, for example. Specifically, a DC power source (V2) is provided at the ground electrode side, allowing the bias voltage to be applicable in response to a voltage difference from the voltage at the signal electrode side, so that the ground electrode side is constructed as a bias element. As a result of such a design, it becomes possible to apply a bias voltage without necessity to provide a bias circuit such as that shown in FIG. 2. Thus, the problem due to the physical size of the bias circuit, which arises when miniaturization and densification are expected to be achieved, is overcome to a certain extent.
Further, FIG. 4 (a) and FIG. 4 (b) show top views of silicon substrates relating to electrode structures of silicon photonics modulators, and they correspond to the circuit of FIG. 3. FIG. 4 (a) is a single-channel-type electrode structure, and FIG. 4 (b) shows an overview of a multichannel-type electrode structure (three channels in the figure).
As shown in FIG. 4 (a), an example basic structure of a single-channel-type electrode is realized by providing a modulator waveguide with patterns of two parallel bias electrical wires V for applying bias voltages, and a pattern of a signal electrode part S comprising three segments for inputting electric signals and a pattern of a corresponding complementary signal electrode part S′ between the two electrical wire patterns.
In reality, a driver circuit (not shown in the figures) is positioned over the above elements. Further, a silicon photonics modulator itself is positioned below each of patterns of the signal electrode part S comprising three segments and the complementary signal electrode part S′. That is, in this explanation, a silicon photonics modulator with a divided-type electrode (a divided-type modulator) is assumed. On the other hand, in the case that a modulator with a travelling-wave-type electrode (a travelling-wave-type modulator) is applied, a person skilled in the art will understand that each of patterns of the signal electrode part S and the corresponding complementary signal electrode part S′ comprises a single segment, and that a single modulator is arranged below each of the patterns.
An electrode structure for a silicon photonics modulator in FIG. 4 (b) is realized as an embodiment which comprises three sets of the electrode structures shown in FIG. 4 (a), each corresponding to a single channel, which are arranged in parallel with each other to thereby have a multichannel structure (three channels) and high density.
FIG. 5 is a circuit diagram comprising the equivalent circuit of the electrode structure shown in FIG. 3, wherein inductance (L2) is further added thereto by taking increasing of inductance due to densification into consideration. FIG. 6 is a graph of frequency response of a modulator which is measured by use of the circuit shown in FIG. 5 while changing the value of the inductance L2. In this case, the horizontal axis represents frequencies (the unit is GHz) and the vertical axis represents frequency response (the unit is dB); and the cases that the inductance values of L2 shown in FIG. 5 are set to 0.2 nH, 0.1 nH, 0.05 nH, and 0 nH correspond to lines [1]-[4] in the graph, respectively.
As would be understood from the graph in FIG. 6, when the frequency is 10 GHz, for example, it can be seen that the frequency response becomes lower as the inductance becomes larger (from 0 nH), that is, the impedance of the electrical wire pattern increases and, as a result, the frequency response deteriorates.
That is, as explained in relation to FIG. 4 (a), narrowing, as a result of densification, of the width w of the electrical wire of the electrical wire pattern V of the bias means increasing of inductance, and the characteristic of the modulator is adversely affected thereby. On the other hand, even in the case that the width w of the electrical wire of the electrical wire pattern V of the bias is widen by taking the above inductance into consideration, it is observed, according to experiments performed by the inventors of the invention, that there is almost no improvement with respect to the frequency response of the modulator (also refer to FIG. 13 which will be explained later), and, rather, deterioration in the electric signal waveform in a high frequency signal is observed. Thus, the width w of the electrical wire of the electrical wire pattern V of the bias, is of no direct effect on improvement of the frequency response of the silicon photonics modulator.